IC42S8200 Datasheet, PDF (49/76 Pages) Integrated Circuit Solution Inc – 1Meg x 8 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM

1+" 5& 
Read Cycle / Page Mode; Data Masking
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9 T10
CLK
tCKS
CKE
tCS
CS
RAS
tCHI
tCK
tCL
tCKA
tCH
tCS
tCH
CAS
WE
A0-A9
A10
A11
DQM
I/O
tCS
tCH
tCS
tCH
tAS
tAH
ROW
tAS
tAH
ROW
tAS
tAH
BANK 1
BANK 0
tRCD
tRAS
tRC
<ACT>
(1)
COLUMN m
NO PRE
BANK 1
BANK 0
tCS
tQMD
(1)
COLUMN n
NO PRE
BANK 1
NO PRE
BANK 0
tCH
(1)
COLUMN o
AUTO PRE
NO PRE
BANK 1
BANK 0 _tQMD
BANK 0 AND 1
BANK 0 OR 1
BANK 1
BANK 0
tAC
tAC
tAC
tOH
tOH
tOH
tAC
tAC
tOH
tOH
DOUT m
DOUT m+1
DOUT n
DOUT o
DOUT o+1
tLZ
tCAC
tHZ
tCAC
tLZ
tCAC
tHZ
tRQL
tRP
<READ>
<MASK> <READ, ENB>
<READA, ENB>
<PRE>
<PALL>
CAS latency = 2, burst length = 2
Undefined
Don’t Care
Note 1: A8,A9 = Don't Care.
Integrated Circuit Solution Inc.
49
DR018-0A 07/10/2001