IC42S8200 Datasheet, PDF (42/76 Pages) Integrated Circuit Solution Inc – 1Meg x 8 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM

1+" 5& 
Read Cycle / .ull Page
T0
T1
T2
T3
T4
CLK
tCKS
CKE
tCS
CS
RAS
CAS
WE
A0-A9
A10
A11
tCHI
tCK
tCL
tCKA
tCH
tCS
tCH
tCS
tCH
tCS
tCH
tAS
tAH
ROW
tAS
tAH
ROW
tAS
tAH
BANK 0
(1)
COLUMN
NO PRE
BANK 0
DQM
tCS
tQMD
tAC
I/O
tLZ
tRCD
tCAC
(BANK 0)
tRAS
tRC
(BANK 0)
<ACT 0> <READ0>
CAS latency = 2, burst length = full page
T5
T6
T260
T261
T262 T263
BANK 0 OR 1
BANK 0
tCH
tAC
tOH
DOUT 0m
tAC
tOH
DOUT 0m+1
tAC
tOH
DOUT 0m-1
tAC
tOH
DOUT 0m
tOH
DOUT 0m+1
tHZ
tRBD
tRP
(BANK 0)
<BST>
<PRE 0>
Undefined
Don’t Care
Note 1: A8,A9 = Don't Care.
42
Integrated Circuit Solution Inc.
DR018-0A 07/10/2001