IC42S8200 Datasheet, PDF (47/76 Pages) Integrated Circuit Solution Inc – 1Meg x 8 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM

1+" 5& 
Write Cycle / Ping-Pong Operation
T0
T1
T2
T3
T4
T5
CLK
tCKS
CKE
tCS
CS
tCHI
tCK
tCL
tCKA
tCH
tCS
tCH
RAS
tCS
tCH
CAS
tCS
tCH
WE
A0-A9
tAS
tAH
ROW
(1)
COLUMN
ROW
tAS
tAH
AUTO PRE
A10
ROW
ROW
tAS
tAH
NO PRE
A11
BANK 0
BANK 0
BANK 1
tCS
DQM
T6
T7
T8
T9 T10
(1)
COLUMN
AUTO PRE
NO PRE
BANK 1
BANK 0 OR 1
BANK 0
ROW
ROW
BANK 0
tCH
tDS
tDH tDS tDH tDS tDH tDS tDH tDS tDH tDS tDH tDS tDH tDS tDH
I/O
DIN 0m
DIN 0m+1 DIN 0m+2 DIN 0m+3
DIN 1m
DIN 1m+1 DIN 1m+2 DIN 1m+3
tRRD
(BANK 0 TO 1)
tRCD
(BANK 0)
tRAS
(BANK 0)
tRC
(BANK 0)
<ACT 0>
tRCD
(BANK 1)
<WRIT 0>
<WRITA 0>
tRAS
(BANK 1)
tRC
(BANK 1)
<ACT 1>
tDPL
tDPL
tRP
(BANK 0)
tRCD
(BANK 0)
tRAS
(BANK 0)
tRC
(BANK 0)
<WRIT 1>
<WRITA 1>
<PRE 0>
<ACT 0>
CAS latency = 2, burst length = 2
Undefined
Don’t Care
Note 1: A8,A9 = Don't Care.
Integrated Circuit Solution Inc.
47
DR018-0A 07/10/2001