IC42S8200 Datasheet, PDF (59/76 Pages) Integrated Circuit Solution Inc – 1Meg x 8 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM

1+" 5& 
Read Cycle
T0
T1
T2
CLK
tCKS
CKE
tCS
CS
RAS
tCHI
tCK
tCL
tCKA
tCH
tCS
tCH
CAS
WE
A0-A9
A10
A11
tCS
tCH
tCS
tCH
tAS
tAH
ROW
tAS
tAH
ROW
tAS
tAH
BANK 1
BANK 0
DQM
I/O
tRCD
tRAS
tRC
<ACT>
T3
T4
T5
T6
T7
T8
T9 T10
T11
(1)
COLUMN m
NO PRE
BANK 1
BANK 0
tCS
tCAC
BANK 0 AND 1
BANK 0 OR 1
BANK 1
tQMD
tCH ^{BANK 0}
tAC
tLZ
tAC
tOH
DOUT m
tAC
tOH
DOUT m+1
tAC
tOH
DOUT m+2
tRQL
tRP
tOH
DOUT m+3
tHZ
<READ>
<PRE>
<PALL>
CAS latency = 3, burst length = 4
T12
ROW
ROW
BANK 1
BANK 0
tRCD
tRAS
tRC
<ACT>
Undefined
Don’t Care
Note 1: A8,A9 = Don't Care.
Integrated Circuit Solution Inc.
59
DR018-0A 07/10/2001