IC42S8200 Datasheet, PDF (66/76 Pages) Integrated Circuit Solution Inc – 1Meg x 8 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM

1+" 5& 
Write Cycle / Ping-Pong Operation (Bank Switching)
T0
T1
T2
T3
T4
T5
T6
CLK
tCKS
CKE
tCS
CS
tCHI
tCK
tCL
tCKA
tCH
tCS
tCH
RAS
tCS
tCH
CAS
tCS
tCH
WE
A0-A9
tAS
tAH
ROW
(1)
COLUMN
ROW
tAS
tAH
A10
ROW
tAS
tAH
A11
BANK 0
AUTO PRE
ROW
NO PRE
BANK 0 _{BANK 1}
tCS
DQM
T7
T8
T9 T10
(1)
COLUMN
AUTO PRE
NO PRE
BANK 1
BANK 0 OR 1
BANK 0
T11 T12
ROW
ROW
BANK 1
tCH^{BANK 0}
I/O
tRRD
(BANK 0 TO 1)
tRCD
(BANK 0)
tRAS
(BANK 0)
tRC
(BANK 0)
<ACT 0>
CAS latency = 3, burst length = 4
tDS
tDH tDS tDH tDS tDH tDS tDH tDS tDH tDS tDH tDS tDH tDS tDH
DIN 0m DIN 0m+1 DIN 0m+2 DIN 0m+3 DIN 1m DIN 1m+1 DIN 1m+2 DIN 1m+3
tRCD
(BANK 1)
<WRIT 0>
<WRITA 0>
tRAS
(BANK 1)
tRC
(BANK 1)
<ACT 1>
tDPL
(BANK 0)
tRP
(BANK 0)
<WRIT 1>
<WRITA 1>
<PRE 0>
tDPL
tRCD
tRAS
tRC
<ACT 0>
Undefined
Don’t Care
Note 1: A8,A9 = Don't Care.
66
Integrated Circuit Solution Inc.
DR018-0A 07/10/2001