IC42S8200 Datasheet, PDF (74/76 Pages) Integrated Circuit Solution Inc – 1Meg x 8 Bits x 2 Banks (16-MBIT) SYNCHRONOUS DYNAMIC RAM

1+" 5& 
Write Cycle / Precharge Termination
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
CLK
tCKS
CKE
tCS
CS
tCHI
tCK
tCL
tCKA
tCH
tCS
tCH
RAS
tCS
tCH
CAS
tCS
tCH
WE
A0-A9
tAS
tAH
ROW
(1)
COLUMN m
tAS
tAH
A10
ROW
tAS
tAH
A11
BANK 0
DQM
NO PRE
BANK 0
tCS
BANK 0 OR 1
BANK 0
tCH
tCS _tCH
tDH
tDH
tDH
tDS
tDS
tDS
I/O
DIN 0m
DIN 0m+1
DIN 0m+2
tRCD
tRAS
tRC
<ACT 0>
CAS latency = 3, burst length = 4
<WRIT 0>
tRP
<PRE 0>
T10
T11
T12
ROW
ROW
BANK 1
BANK 0
tRCD
tRAS
tRP
<ACT >
Undefined
Don’t Care
Note 1: A8,A9 = Don't Care.
74
Integrated Circuit Solution Inc.
DR018-0A 07/10/2001