HDM8513A Datasheet, PDF (56/67 Pages) Hynix Semiconductor – DVB/DSS Compliant Receiver

0B
0C
0D
0E, 0F
16,17,18
19
1A
In-Phase
The eight bit output of the In-phase baseband filter is available at this
location. This data is updated once per symbol.
Quadrature
The eight bit output of the quadrature baseband filter is available at this
location. This data is updated once per symbol.
Noise Power
This eight bit output provides a measure of the noise component of the
signal when QPSK lock is achieved. Higher numbers correspond to lower
signal-to-noise ratio conditions. The quality of this metric is improved if
the narrowband AGC is disabled for a minimum of 1000 symbol periods
before this parameter is read.
BER Calculator
The current value of the 16bit BER is used to monitor the signal quality or
estimate the SNR of incoming signal at the output of Viterbi. Bit 7 of
address 0E is the MSB and bit 0 of address 0F is the LSB. It represents
the number of errors among 2²⁰ data bits.
Signal Quality
This 24 bit signal provides a measure of quality of the signal processed by
the Viterbi decoder. This parameter can be used to infer bit error rate and
input signal-to-noise ratio for signals which are within a few dB of threshold.
Bit 7 of address 16 is the MSB and bit 0 of address 18 is the LSB.
The specific definition of this signal for each coding rate is TBD.
Viterbi Rate
This three bit number represents the code rate of the Viterbi decoder.
Rate 1/2 0
Rate 2/3 1
Rate 3/4 2
Rate 5/6 3
Rate 7/8 4
Reed Solomon Errors
The four bit number at this location indicates the number of errors
corrected in the most current block of 188 bytes. This number may range
from 0 to 8.
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