HDM8513A Datasheet, PDF (41/67 Pages) Hynix Semiconductor – DVB/DSS Compliant Receiver

retransmit the HDM8513A slave address, this time with the read/not write bit set to one (read).
This will be acknowledged by the HDM8513A, which then assumes the role of slave transmitter
and transmits the requested byte. This byte should be acknowledged by the master receiver. If no
stop condition is generated by the master, the HDM8513A will increment its word address pointer
and transmit the next byte of information. This process is detailed in Figure 26.
acknowledgement
from slave
acknowledgement
from slave
acknowledgement
from slave
acknowledgement
from master
7 Bits
8 Bits
7 Bits
S SLAVE ADDRESS 0 A WORD ADDRESS A S SLAVE ADDRESS 1 A DATA BYTE
A
R/W
R/W
HDM8513A becomes
slave transmitter
auto increment
memory word address
S: Start Condition
A: Acknowledge
P: Stop Condition
FIGURE 27: I2C READ FROM THE HDM8513A
acknowledgement
from master
DATA BYTE A P
last byte
auto increment
memory word address
Table 13: I2C Slave Address
I2C_ADD0
0
1
0
1
0
1
0
1
I2C_ADD1
0
0
1
1
0
0
1
1
I2C_ADD2
0
0
0
0
1
1
1
1
I2C Address
0000000
0000011
0001100
0001111
0110000
0110011
0111100
0111111
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