HDM8513A Datasheet, PDF (31/67 Pages) Hynix Semiconductor – DVB/DSS Compliant Receiver

4. Mechanical Specifications
4.1 100 Pin Quad Flat Pack
4.1.1 Pin Assignment
1
DATA_CLK
26
2 FRAME_ERROR 27
3 FRAME_SYNC 28
4
VDD
29
5
VSS
30
6
LNB_TONE
31
7 SIGMADELTA 32
8 SYMBOL_CLOCK 33
9
WB_AGC
34
10 QPSK_LOCK 35
11
IOVDD
36
12
IOVSS
37
13
TEST15
38
14
TEST14
39
15
TEST13
40
16
TEST12
41
17
VDD
42
18
VSS
43
19
TEST11
44
20
TEST10
45
21
TEST9
46
22
TEST8
47
23
IOVDD
48
24
IOVSS
49
25
TEST7
50
TEST6
VDDA
VSSA
VTOP
AIN_I
VSSA
VDDA
REF_I
REF_Q
AIN_Q
VBOT
VSS
TEST5
TEST4
TEST3
VDD P
VSS P
TEST2
TEST1
TEST0
XTAL1
CLOCK
IOVDD
IOVSS
RESET
51 HI_ADDR4 76
52 HI_ADDR3 77
53 HI_ADDR2 78
54 HI_ADDR1 79
55 HI_ADDR0 80
56
VDD
81
57
VSS
82
58 HI_DATA7 83
59 HI_DATA6 84
60 HI_DATA5 85
61 HI_DATA4 86
62
IOVDD
87
63
IOVSS
88
64 HI_DATA3 89
65 HI_DATA2 90
66 HI_DATA1 91
67
HI_DATA0 92
68
VDD
93
69
VSS
94
70 VB_NODESYNC 95
71 VB_CLOCK 96
72 VB_DATA
97
73
VDD
98
74
VSS
99
75 BUSMODE 100
DTACK
SDA_I2CO
SDA_I2C
SCL_I2CO
SCL_I2C
IOVDD
IOVSS
R/W(/RE)
/CE
/DS(/WE)
VDD
VSS
DATA7
DATA6
DATA5
LOCK
DATA4
DATA3
IOVDD
IOVSS
DATA2
DATA1
DATA0
DATA_VALID
DATA_STB
31