HY5DU283222AQ Datasheet, PDF (48/51 Pages) Hynix Semiconductor – 128M(4Mx32) GDDR SDRAM

Write Without Auto Precharge
/CK
CK
CKE
tIH
tIS
CMD
NOP
RA, CA
tCK
tCH tCL
Write
tIS tIH
Col n
NOP
NOP
NOP
RA
AP
BA0,BA1
Case 1 :
tDQSS = min
DQS
DQ
tIS tIH
DIS AP
tIS tIH
Bank x
tDQSS
tDQSH
tDSH
tWPRES
tWPRE
DI
n
tDQSL
tWPST
DM
HY5DU283222AQ
NOP
PRE
Valid
NOP
NOP
All Bank
One Bank
Bank x
tRP
tDPL
ACT
RA
RA
RA
BA
Case 2 :
tDQSS = max
DQS
DQ
DM
tDQSS
tDSS
tDQSH
tWPRES
tWPRE
DI
n
tDQSL
tDSS
tWPST
DI n = Data in for column n
Burst length = 4 in the case shown
3 subsequent elements of Data In are provided in the programmed order following DI n
DIS AP = Disable Autoprecharge
* = * “ Don’t Care”, if AP is high at this point
PRE = Precharge, ACT=Active, RA=Row Address, BA=Bank Address
NOP commands are shown for ease of illustration; other valid commands may be possible at these times
Rev. 0.2 / Sep. 2003
Don’t care
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