HY5DU283222AQ Datasheet, PDF (40/51 Pages) Hynix Semiconductor – 128M(4Mx32) GDDR SDRAM

HY5DU283222AQ
CAPACITANCE (TA=25^oC, f=1MHz )
Parameter
Input Clock Capacitance
Input Capacitance
Input / Output Capacitance
Pin
CK, CK
All other input-only pins
DQ, DQS, DM
Symbol
Min
Max
Unit
CCK
1.7
2.7
pF
CIN
1.7
2.7
pF
CIO
3.7
4.7
pF
Note :
1. VDD = min. to max., VDDQ = 2.3V to 2.7V, VODC = VDDQ/2, VOpeak-to-peak = 0.2V
2. Pins not under test are tied to GND.
3. These values are guaranteed by design and are tested on a sample basis only.
OUTPUT LOAD CIRCUIT
VTT
VTT
RT=50Ω
RT=50Ω
Output
RS=25Ω
Zo=50Ω
CL=30pF
VREF
Rev. 0.2 / Sep. 2003
40