HY5DU283222AQ Datasheet, PDF (45/51 Pages) Hynix Semiconductor – 128M(4Mx32) GDDR SDRAM

Read Without Auto Precharge
HY5DU283222AQ
//CK
CK
CKE
CMD
tIS tIH
tIS tIH
NOP
CA, RA
tCK
tCH tCL
READ
tIS tIH
Col n
NOP
PRE
NOP
tIH
NOP
ACT
RA
VALID
NOP
RA
AP
BA0,BA1
DM
Case 1:
tAC/tDQSCK=min
DQS
DQ
Case 2:
tAC/tDQSCK=max
DQS
DQ
tIS tIH
tIS tIH
Bank x
CL = 2
ALL BANKS
ONE BANK
*Bank x
tRP
RA
RA
Bank x
tRPRE
tDQSCK
min
tRPST
tLZ
tHZ
min
min
Do
n
tLZ
tAC
min
min
tRPRE
tDQSCK
max
tLZ
max
Do
n
tLZ
tAC
max
max
tRPST
tHZ
max
DO n = Data Out from column n
Burst Length = 4 in the case shown
3 subsequent elements of Data Out are provided in the programmed order following DO n
DIS AP = Disable Autoprecharge
* = “Don’t Care”, if AP is HIGH at this point
PRE = PRECHARGE, ACT = ACTIVE, RA = Row Address, BA = Bank Address
NOP commands are shown for ease of illustration ; other commands may be valid at these times
VALID
NOP
VALID
NOP
Don’t Care
Rev. 0.2 / Sep. 2003
45