HDMP-2689 Datasheet, PDF (28/28 Pages) Agilent(Hewlett-Packard) – Quad 2.125/1.0625 GBd Fibre Channel General Purpose SerDes

Management Interface Registers, continued
Reg 25
Serdes Configuration Reg 2
Default
15
Reserved
0
14
Pattern Error Monitor Enable
0
13
Test Loopback Enable
0
12
PRBS Enable
0
11
Pattern Toggle Enable
0
10
User Register Enable
0
9:0
User Register[9:0]
10'h0FA
Register 25 includes writeable configuration for self-test. See the “Test” section under the functional description.
Mode
Reserved RW
RW
RW
RW
RW
RW
RW
Reg 26
Serdes Configuration Reg 3
Default
Mode
15:11
TX Amplitude[4:0]
5’h1F
RW
10:8
TX Peak[2:0]
3’h3
RW
7
TX Output Driver Enable
1
RW
6:0
Reserved
7'h00
Reserved Rw
Register 26 includes writeable configuration of a channel’s serializer. Bits 15 through 11 and 10 through 8 are used to set the pre-emphasis on the serial
output. These values determine the signal amplitude in the bit time immediately after a transition on the high speed output and in subsequent bit times.
Bit 7, when set to logic one, enable channel to drive the data onto the serial output. When set to logic zero, the serial outputs are pulled high and the data
is not driven out.
Reg 27
Serdes Status
Default
Mode
15:13
Reserved
3’b000
R0
12
Pattern Failure Detect
1
RO
11
Test Run Complete
0
RO
10:0
Reserved
11’h000
RO
Register 27 includes read only status of self test information. See the “Test” section under the functional description. Bits 10 through 0 are reserved.
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Data subject to change.
Copyright © 2004 Agilent Technologies, Inc.
Obsoletes 5988-8120EN
February 25, 2004
5988-9185EN