HD66766R Datasheet, PDF (85/97 Pages) Hitachi Semiconductor – 132 x 176-dot Graphics LCD Controller/Driver for 65K Colors

HD66766R
Rev. 1.0-1 / September 2002
Clock Synchronized Serial Interface Timing Characteristics
Table 53 (Vcc = 2.2 to 2.4 V)
Item
Symbol Unit
Serial clock cycle time
Write
(received)
t_SCYC
us
Read
(transmitted)
t_SCYC
us
Write
(received)
t_SCH
ns
Serial clock high-level pulse width
Read
(transmitted)
t_SCH
ns
Write
(received)
t_SCL
ns
Serial clock low-level pulse width
Read
(transmitted) ^tSCL
ns
Serial clock rise/fall time
Chip select set up time
Chip select hold time
Serial input data set up time
Serial input data hold time
Serial input data delay time
Serial input data hold time
t_{scr, scf}
ns
t_CSU
ns
t_CH
ns
t_SISU
ns
t_SIH
ns
t_SOD
ns
t_SOH
ns
Test Condition
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Min Typ Max
0.1 — 20
0.25 — 20
40 — —
120 — —
40 — —
120 — —
— — 20
20 — —
60 — —
30 — —
30 — —
— — 130
5
——
Table 54 (Vcc = 2.4 to 3.6 V)
Item
Symbol Unit Test Condition Min Typ Max
Serial clock cycle time
Write
t_SCYC
us
(received)
Read
t_SCYC
us
(transmitted)
Write
t_SCH
ns
(received)
Serial clock high-level pulse width
Read
t_SCH
ns
(transmitted)
Figure 3 0.076 — 20
Figure 3 0.15 — 20
Figure 3
Figure 3
40 — —
70 — —
Write
t_SCL
ns
(received)
Serial clock low-level pulse width
Read
t_SCL
ns
(transmitted)
Serial clock rise/fall time
Chip select set up time
Chip select hold time
Serial input data set up time
Serial input data hold time
Serial output data delay time
Serial output data hold time
t_{scr, scf}
ns
t_CSU
ns
t_CH
ns
t_SISU
ns
t_SIH
ns
t_SOD
ns
t_SOH
ns
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
Figure 3
35 — —
70 — —
— — 20
20 — —
60 — —
30 — —
30 — —
— — 130
5
—
—
85