HD66766R Datasheet, PDF (50/97 Pages) Hitachi Semiconductor – 132 x 176-dot Graphics LCD Controller/Driver for 65K Colors

HD66766R
Rev. 1.0-1 / September 2002
Window Address Function
When data is written to the on-chip GRAM, a window address-range which is specified by the horizontal
address register (start: HSA7-0, end: HEA7-0) or the vertical address register (start: VSA7-0, end: VEA7-
0) can be written to consecutively.
Data is written to addresses in the direction specified by the AM bit (increment/decrement). When image
data, etc. is being written, data can be written consecutively without thinking a data wrap by doing this.
The window must be specified to be within the GRAM address area described below. Addresses must
be set within the window address.
[Restriction on window address-range settings]
(horizontal direction) “00”H ≤ HSA7-0 ≤ HEA7-0 ≤ “83”H
(vertical direction) “00”H ≤ VSA7-0 ≤ VEA7-0 ≤ “AF”H
[Restriction on address settings during the window address]
(RAM address) HSA7-0 ≤ AD7-0 ≤ HEA7-0
VSA7-0 ≤ AD15-8 ≤ VEA7-0
Note: In high-speed RAM-write mode, the lower two bits of the address must be set as shown below
according to the value of the ID0 bit.
ID0=0: The lower two bits of the address must be set to “11”.
ID0=1: The lower two bits of the address must be set to “00”
0000H
GRAM address map
Window address area
2010H
2110H
202FH
212FH
0083H
5F10H
5F2FH
AF00H
AF83H
Window address-range specification area
HSA5-0=10H, HSE5-0=2FH
VSA7-0=20H, VEA7-0=5FH
I/D0=1 (increment)
AM=0 (horizontal writing)
Figure 36 Example of Address Operation in the Window Address Specification
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