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HD66766R Datasheet, PDF (84/97 Pages) Hitachi Semiconductor – 132 x 176-dot Graphics LCD Controller/Driver for 65K Colors
HD66766R
Rev. 1.0-1 / September 2002
Normal Write Mode (HWM = 0)
Table 51 (Vcc = 2.4 to 3.6 V)
Item
Bus cycle time
Write low-level pulse width
Read low-level pulse width
Write high-level pulse width
Read high-level pulse width
Write/Read rise/fall time
Set up time
(RS to CS*, WR*, RD*)
Address hold time
Write data setup time
Write data hold time
Read data delay time
Read data hold time
Symbol Unit Test
Min Typ Max
Condition
Note
Write tCYCW ns Figure 2 200
—
—
Read
tCYCR
ns Figure 2 300
—
—
PWLW ns Figure 2
40
—
—
PWLR ns Figure 2 150
—
—
PWHW ns Figure 2 100
—
—
PWHR ns Figure 2 100
—
—
tWRr, WRf
ns
Figure 2
—
—
25
10
—
— Using status read
tAS
ns Figure 2
0
—
— Not using status read
tAH
ns Figure 2
2
tDSW
ns Figure 2
60
tH
ns Figure 2 2
tDDR
ns Figure 2
—
tDHR
ns Figure 2
5
—
—
—
—
—
—
— 100
—
—
High-Speed Write Mode (HWM=1)
Table 52 (Vcc = 2.4 to 3.6 V)
Item
Bus cycle time
Write low-level pulse width
Read low-level pulse width
Write high -level pulse width
Read high -level pulse width
Write/Read rise/fall time
Set up time
(RS to CS*, WR*, RD*)
Address hold time
Write data set up time
Write data hold time
Read data delay time
Read data hold time
Symbol Unit Test Min Typ
Condition
Write tCYCW ns Figure 2 100 —
Read tCYCR
ns Figure 2 300 —
PWLw ns Figure 2 40 —
PWLR ns Figure 2 150 —
PWHW ns Figure 2 40 —
PWHR ns Figure 2 100 —
t WRr, WRf ns Figure 2 —
—
10 —
tAS
ns Figure 2
0—
tAH
ns Figure 2 2 —
tDSW
ns Figure 2 60 —
tH
ns Figure 2 2 —
tDDR
ns Figure 2 — —
tDHR
ns Figure 2 5
—
Max
—
—
—
—
—
—
25
—
—
—
—
—
100
—
Note
Using status read
Not using status read
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