HD66766R Datasheet, PDF (15/97 Pages) Hitachi Semiconductor – 132 x 176-dot Graphics LCD Controller/Driver for 65K Colors

HD66766R
Rev. 1.0-1 / September 2002
GRAM ADDRESS DIAGRAM (HD66766R)
Table 7 Relationship between GRAM address and display position (SGS = “0”)
SEG/COM pins
CMS=0
COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10
COM11
COM12
COM13
COM14
COM15
COM16
COM17
COM18
COM19
COM20
DB
DB DB
DB DB
DB DB
DB
CMS=1 15
0 15
0 15
0 15
0
COM176 "0000"H "0001"H "0002"H "0003"H
COM175 "0100"H "0101"H "0102"H "0103"H
COM174 "0200"H "0201"H "0202"H "0203"H
COM173 "0300"H "0301"H "0302"H "0303"H
COM172 "0400"H "0401"H "0402"H "0403"H
COM171 "0500"H "0501"H "0502"H "0503"H
COM170 "0600"H "0601"H "0602"H "0603"H
COM169
COM168
COM167
"0700"H
"0800"H
"0900"H
"0701"H
"0801"H
"0901"H
"0702"H
"0802"H
"0902"H
"0703"H
"0803"H
"0903"H
COM166 "0A00"H "0A01"H "0A02"H "0A03"H
COM165 "0B00"H "0B01"H "0B02"H "0B03"H
COM164 "0C00"H "0C01"H "0C02"H "0C03"H
COM163 "0D00"H "0D01"H "0D02"H "0D03"H
COM162 "0E00"H "0E01"H "0E02"H "0E03"H
COM161 "0F00"H "0F01"H "0F02"H "0F03"H
COM160 "1000"H "1001"H "1002"H "1003"H
COM159
COM158
COM157
"1100"H
"1200"H
"1300"H
"1101"H
"1201"H
"1301"H
"1102"H
"1202"H
"1302"H
"1103"H
"1203"H
"1303"H
COM169
COM170
COM171
COM172
COM173
COM174
COM175
COM176
COM8
COM7
COM6
COM5
COM4
COM3
COM2
COM1
"A800"H "A801"H "A802"H "A803"H
"A900"H "A901"H "A902"H "A903"H
"AA00"H "AA01"H "AA02"H "AA03"H
"AB00"H "AB01"H "AB02"H _"AB03"H
"AC00"H "AC01"H "AC02"H "AC03"H
"AD00"H "AD01"H "AD02"H "AD03"H
"AE00"H "AE01"H "AE02"H _"AE03"H
"AF00"H "AF01"H "AF02"H "AF03"H
DB
DB DB
DB DB
DB DB
DB
15
0 15
0 15
0 15
0
"0080"H "0081"H "0082"H ^"0083"H
"0180"H "0181"H "0182"H ^"0183"H
"0280"H "0281"H "0282"H ^"0283"H
"0380"H "0381"H "0382"H "0383"H
"0480"H "0481"H "0482"H "0483"H
"0580"H "0581"H "0582"H "0583"H
"0680"H "0681"H "0682"H "0683"H
"0780"H "0781"H "0782"H "0783"H
"0880"H "0881"H "0882"H "0883"H
"0980"H "0981"H "0982"H "0983"H
"0A80"H "0A81"H "0A82"H "0A83"H
"0B80"H "0B81"H "0B82"H "0B83"H
"0C80"H "0C81"H "0C82"H "0C83"H
"0D80"H "0D81"H "0D82"H "0D83"H
"0E80"H "0E81"H ^"0E82"H "0E83"H
"0F80"H "0F81"H "0F82"H "0F83"H
"1080"H "1081"H ^"1082"H "1083"H
"1180"H "1181"H ^"1182"H "1183"H
"1280"H "1281"H "1282"H "1283"H
"1380"H "1381"H "1382"H "1383"H
"A880"H "A881"H "A882"H "A883"H
"A980"H "A981"H "A982"H "A983"H
"AA80"H "AA81"H "AA82"H "AA83"H
"AB80"H "AB81"H "AB82"H "AB83"H
"AC80"H "AC81"H "AC82"H "AC83"H
"AD80"H "AD81"H "AD82"H "AD83"H
"AE80"H "AE81"H "AE82"H "AE83"H
"AF80"H "AF81"H "AF82"H "AF83"H
Table 8 Relationship between GRAM data and output pin
GRAM DATA
DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB
15 14 ^{13 12 11 10 9 8 7 6 5}
4
3
2
1
0
Selected
palette
PK palette
PK palette + FRC
PK palette
Output pin
SEG (3n+1)
SEG (3n+2)
SEG (3n+3)
Note: n = Lower 8 bits address (0 to 131)
15