HD66766R Datasheet, PDF (13/97 Pages) Hitachi Semiconductor – 132 x 176-dot Graphics LCD Controller/Driver for 65K Colors

HD66766R
Rev. 1.0-1 / September 2002
Block Function Description
System Interface
The HD66766R has five high-speed system interfaces: an 80-system 16-bit/8-bit bus, a 68-system 16-
bit/8-bit bus, and a Clock synchronized serial interface. The IM2-0 pins select the interface mode.
The HD66766R has three 16-bit registers: an index register (IR), a write data register (WDR), and a read
data register (RDR). The IR stores index information from the control registers and the GRAM. The
WDR temporarily stores data to be written into control registers and the GRAM, and the RDR
temporarily stores data read from the GRAM. Data written into the GRAM from the MPU is first written
into the WDR and then is automatically written into the GRAM by internal operation. Data is read
through the RDR when reading from the GRAM, and the first read data is invalid and the second and the
following data are normal.
Execution time for instruction excluding oscillation start is 0-clock cycle and instructions can be written
in succession.
Table 5 Register Selection (8/16 Parallel Interface)
80-series Bus
WR
RD
0
1
1
0
0
1
1
0
68-series Bus
R/W
RS
0
0
1
0
0
1
1
1
Operations
Writes indexes into IR
Reads internal status
Writes into control registers and GRAM through WDR
Reads from GRAM through RDR
Table 6 Register Selection (Clock synchronized Serial Interface)
Start bytes
R/W Bit RS Bit
0
0
1
0
0
1
1
1
Operations
Writes indexes into IR
Reads internal status
Writes into control registers and GRAM through WDR
Reads from GRAM through RDR
Bit Operation
The HD66766R supports the following functions. A write data mask function that selects data into the
GRAM in bit units, and a logic operation function that performs logic operations or conditional
determination on the display data set in the GRAM and writes into the GRAM. With the 16-bit bus
interface, these functions can greatly reduce the processing lord of the MPU graphics software the display
data in the GRAM at high speed. For details, see the Graphics Operation Function section.
Address Counter (AC)
The address counter (AC) assigns address to the GRAM. When an address set instruction is written into
the IR, the address information is sent from the IR to the AC. After writing into the GRAM, the AC is
automatically incremented by 1 (or decrement by 1). After reading from the GRAM, the AC is not
updated.
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