HD66766R Datasheet, PDF (83/97 Pages) Hitachi Semiconductor – 132 x 176-dot Graphics LCD Controller/Driver for 65K Colors

HD66766R
Rev. 1.0-1 / September 2002
80-system Bus Interface Timing Characteristics
Normal Write Mode (HWM=0)
Table 49 (Vcc = 2.2 to 2.4 V)
Item
Bus cycle time
Write low-level pulse width
Read low-level pulse width
Write high-level pulse width
Read high-level pulse width
Write/Read rise/fall time
Setup time
(RS to CS*, WR*, RD*)
Address hold time
Write data set up time
Write data hold time
Read data delay time
Read data hold time
Symbol Unit Test
Min Typ Max
Condition
Write t_CYCW ns Figure 2 600
—
—
Read
t_CYCR
ns Figure 2 800
—
—
PW_LW ns Figure 2
90
—
—
PW_LR ns Figure 2 350
—
—
PW_HW ns Figure 2 300
—
—
PW_HR ns Figure 2 400
—
—
t_{WRr, WRf}
ns
Figure 2
—
—
25
t_AS
ns Figure 2 10
—
—
t_AH
ns Figure 2
5
t_DSW
ns Figure 2
60
t_H
ns Figure 2 15
t_DDR
ns Figure 2
—
t_DHR
ns Figure 2
5
—
—
—
—
—
—
— 200
—
—
High-Speed Write Mode (HWM=1)
Table 50 (Vcc = 2.2 to 2.4 V)
Item
Bus cycle time
Write low-level pulse width
Read low-level pulse width
Write high-level pulse width
Read high-level pulse width
Write/Read rise/fall time
Set up time
(RS to CS*, WR*, RD*)
Address hold time
Write data set up time
Write data hold time
Read data delay time
Read data hold time
Symbol Unit Test
Min Typ Max
Condition
Write t_CYCW ns Figure 2 200
—
—
Read
t_CYCR
ns Figure 2 800
—
—
PW_LW ns Figure 2
90
—
—
PW_LR ns Figure 2 350
—
—
PW_HW ns Figure 2
90
—
—
PW_HR ns Figure 2 400
—
—
t_{WRr, WRf}
ns
Figure 2
—
—
25
t_AS
ns Figure 2 10
—
—
t_AH
ns Figure 2
5
—
—
t_DSW
ns Figure 2
60
—
—
t_H
ns Figure 2 15
—
—
t_DDR
ns Figure 2
—
— 200
t_DHR
ns Figure 2
5—
—
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