HD66766R Datasheet, PDF (44/97 Pages) Hitachi Semiconductor – 132 x 176-dot Graphics LCD Controller/Driver for 65K Colors

HD66766R
Rev. 1.0-1 / September 2002
a) Timing of basic data-transfer through clock synchronized serial interface
Transfer start
Transfer end
CS*
(input)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
SDI
(input)
SDO
(output)
MSB
LSB
"0"
"1" "1" "1"
"0"
D
RS
RW
DB
15
DB DB DB DB DB
14 13 12 11 10
DB DB
98
DB DB DB DB DB DB DB
76543 21
DB
0
Device D
code
RS RW
Start byte
index register
instruction / GRAM write data
DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB DB
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Status read / Ram read
Figure 29 Procedure for transfer through the clock synchronized serial inrface (a)
b) Timing of consecutive data transfer through clock synchronized serial interface
CS
(input)
SCL
(input)
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 2930 31 32
SDI
(input)
Start
Start byte
Instruction(1)
upper 8-bit
Instruction(1)
lower 8-bit
Instruction(2)
upper 8-bit
The first byte after start byte must be upper 8-bit.
Instruction is not executed.
Instruction (1)
execution time
"End"
Figure 30 Procedure for transfer through the clock synchronized serial interface (b)
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