HD66766R Datasheet, PDF (48/97 Pages) Hitachi Semiconductor – 132 x 176-dot Graphics LCD Controller/Driver for 65K Colors

HD66766R
Rev. 1.0-1 / September 2002
High-Speed RAM Write in the Window Address
When a window address range is specified, RAM data which is in an optional window area can be
rewritten consecutively and quickly by inserting dummy write operations so that RAM access counts
become 4N as shown in the tables below.
Dummy write operations may have to be inserted as the first or last operations for a row of data,
depending on the horizontal window-address range specification bits (HSA1 to 0, HEA1 to 0). The
number of dummy write operations of a row must be 4N.
Table 31 Number of Dummy Write Operations in High-Speed RAM Write (HSA Bits)
HSA1
0
0
1
1
HSA0
0
1
0
1
Number of Dummy Write Operations to
be Inserted at the Start of a Row
0
1
2
3
Table 32 Number of Dummy Write Operations in High-Speed RAM Write (HEA Bits)
HEA1
0
0
1
1
HEA0
0
1
0
1
Number of Dummy Write Operations to
be Inserted at the End of a Row
3
2
1
0
Each row of access must consist of 4 x N operations, including the dummy writes.
Horizontal access count = first dummy write count + write data count + last dummy write count = 4 x N
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