HD66717 Datasheet, PDF (81/90 Pages) Hitachi Semiconductor – (Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver)

HD66717
Write Bus Interface Timing Characteristics without Read Operation (V_CC = 2.4V to 5.5V)
Item
Symbol Min
Typ
Max
Unit Test Condition
Enable cycle time
t_CYCE
500
—
—
ns
Figure 52
Enable pulse width V_CC = 2.4 to 3.0V P_WEH
200
—
—
(“High” level)
V_CC = 3.0 to 5.5V P_WEH
150
—
—
Enable rise/fall time
t_Er, t_Ef
—
—
20
Address set-up time (RS, R/W to E)
t_AS
60
—
—
Address hold time
t_AH
20
—
—
Data set-up time
t_DSW
140
—
—
Data hold time
t_H
30
—
—
Clock-Synchronized Serial Interface Operation (V_CC = 2.4V to 5.5V)
Item
Serial clock cycle time
Serial clock high-level width
Serial clock low-level width
Serial clock rise/fall time
Chip select set-up time
Chip select hold time
Serial input data set-up time
Serial input data hold time
Symbol Min
t_SCYC
t_SCH
t_SCL
t , t _{SCr SCf}
t_CSU
t_CH
t_SISU
t_SIH
1
400
400
—
60
200
200
200
Typ
—
—
—
—
—
—
—
—
Max
20
—
—
50
—
—
—
—
Unit
µs
ns
Test Condition
Figure 54
I²C bus Interface Operation (V_CC = 2.4V to 4.5V)
Item
SCL clock cycle time
SCL clock high-level width
SCL clock low-level width
SCL/SDA rise/fall time
Bus free time
Start hold time
Retransmit start set-up time
Stop set-up time
SDA data set-up time
SDA data hold time
Symbol Min
t_SCL
t_SCLH
t_SCLL
t_Sr, t_Sf
t_BUF
t_STAH
t_STAS
t_STOS
t_SDAS
t_SDAH
2
500
1000
—
100
500
500
500
140
0
Typ
—
—
—
—
—
—
—
—
—
—
Max
20
—
—
300
—
—
—
—
—
—
Unit
µs
ns
Test Condition
Figure 55
533