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HD66717 Datasheet, PDF (25/90 Pages) Hitachi Semiconductor – (Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver)
HD66717
Instructions
Outline
Only the instruction register (IR) and the data register (DR) of the HD66717 can be controlled by the
MPU. Before starting internal operation of the HD66717, control information is temporarily stored in
these registers to allow interfacing with various peripheral control devices or MPUs which operate at
different speeds. The internal operation of the HD66717 is determined by signals sent from the MPU.
These signals, which include register selection (RS), read/write (R/W), and the data bus (DB0 to DB7),
make up the HD66717 instructions (Table 17). There are four categories of instructions that:
• Control display
• Control power management
• Set internal RAM addresses
• Perform data transfer with internal RAM
Normally, instructions that perform data transfer with internal RAM are used the most. However, auto-
incrementation by 1 (or auto-decrementation by 1) of internal HD66717 RAM addresses after each data
write can lighten the program load of the MPU.
While an instruction is being executed for internal operation, or during reset, no instruction other than the
busy flag/address read instruction can be executed.
Because the busy flag is set to 1 while an instruction is being executed, check it to make sure it is 0
before sending another instruction from the MPU. If an instruction is sent without checking the busy flag,
the time between the first instruction issue and next instruction issue must be longer than the instruction
execution time itself. Refer to Table 16 for the list of each instruction execution cycles (clock pulses).
The execution time depends on the operating clock frequency (oscillation frequency).
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