HD66717 Datasheet, PDF (26/90 Pages) Hitachi Semiconductor – (Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver)

HD66717
Instruction Description
Status Read
The status read instruction (Figure 4) reads the busy flag (BF) indicating that the system is now internally
operating on a previously received instruction. If BF is 1, the internal operation is in progress. The next
instruction will not be accepted until BF is reset to 0. Check the BF status before the next write operation.
At the same time, the value of the address counter in binary AAAAAAA is read out. This address counter
is used by both CGRAM, DDRAM, and SEGRAM addresses, and its value is determined by the previous
instruction.
Clear Display
The clear display instruction (Figure 5) writes space code (20)H (character pattern for character code
(20)H must be a blank pattern) into all DDRAM addresses. It then sets DDRAM address 0 into the
address counter. It also sets I/D to 1 (increment mode) in entry mode.
RS R/W DB7
DB0
0 1 BF A A A A A A A
Figure 4 Status Read Instruction
RS R/W DB7
DB0
0000000001
Figure 5 Clear Display Instruction
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