HD66717 Datasheet, PDF (57/90 Pages) Hitachi Semiconductor – (Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver)

HD66717
Contrast Adjuster
Multiplexing Drive System
Contrast for an LCD controlled by the multiplexing drive method can be adjusted by varying the liquid-
crystal drive voltage (potential difference between V_CC and V5) through the CT bits of the contrast control
instruction (electron volume function). See Figure 35 and Table 20. The value of a variable resistor (VR)
can be adjusted within the range from 0.4R through 6.4R, where R is a reference resistance obtained by
dividing the total resistance between V_CC and V5.
The HD66717 incorporates a voltage-follower operational amplifier for each of V1 to V5 to reduce
current flowing through the internal bleeder-resistors, which generate different levels of liquid-crystal
drive voltages. Thus, potential differences between V_CC and V1 and between V_EE and V5 must be 0.4V or
greater. Note that the OPOFF pin must be grounded when using the operational amplifiers.
• 1/6 bias (V2 and V3 pins left open)
 LCD drive voltage VLCD: 6R × (V_CC – V_EE)/(6R + VR) (VR = a value within the range from 0.4R
to 6.4R)
 VLCD adjustable range: 0.484 × (V_CC – V_EE) ≤ VLCD ≤ 0.938 × (V_CC – V_EE)
 Potential difference between V_CC and V1: R × (V_CC – V_EE)/(6R + VR) ≥ 0.4 (V)
 Potential difference between V5 and V_EE: VR × (V_CC – V_EE)/(6R + VR) ≥ 0.4 (V)
• 1/4 bias (V2 and V3 pins short-circuited)
 LCD drive voltage VLCD: 4R × (V_CC – V_EE)/(4R + VR) (VR = a value within the range from 0.4R
to 6.4R)
 VLCD adjustable range: 0.385 × (V_CC – V_EE) ≤ VLCD ≤ 0.909 × (V_CC – V_EE)
 Potential difference between V_CC and V1: R × (V_CC – V_EE)/(4R + VR) ³ 0.4 (V)
 Potential difference between V5 and V_EE: VR × (V_CC – V_EE)/(4R + VR) ³ 0.4 (V)
Static Drive System
Contrast for a statically-driven LCD, that is, annunciator display, can be adjusted through the AGND pin.
The annunciators are driven statically by the potential difference between V_CC and AGND. The AGND
pin level must be equal to or greater than the GND level.
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