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HD66717 Datasheet, PDF (14/90 Pages) Hitachi Semiconductor – (Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver) | |||
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HD66717
Table 4 Display-Line Modes, Display-Start Line, and DDRAM Addresses
Display-Start Lines
Display- Duty
1st Line 2nd Line 3rd Line 4th Line 5th Line
Line Mode Ratio Common Pins (SN = 000) (SN = 001) (SN = 010) (SN = 011) (SN = 100)
1-line
1/10 COM1âCOM8 00Hâ0BH 10Hâ1BH 20Hâ2BH 30Hâ3BH 40Hâ4BH
(NL = 00)
2-line
1/18 COM1âCOM8 00Hâ0BH 10Hâ1BH 20Hâ2BH 30Hâ3BH 40Hâ4BH
(NL = 01)
COM9âCOM16 10Hâ1BH 20Hâ2BH 30Hâ3BH 40Hâ4BH 00Hâ0BH
3-line
(NL = 10)
1/26 COM1âCOM8 00Hâ0BH
COM9âCOM16 10Hâ1BH
COM17âCOM24 20Hâ2BH
10Hâ1BH
20Hâ2BH
30Hâ3BH
20Hâ2BH
30Hâ3BH
40Hâ4BH
30Hâ3BH
40Hâ4BH
00Hâ0BH
40Hâ4BH
00Hâ0BH
10Hâ1BH
4-line
(NL = 11)
1/34 COM1âCOM8 00Hâ0BH
COM9âCOM16 10Hâ1BH
COM17âCOM24 20Hâ2BH
COM25âCOM32 30Hâ3BH
10Hâ1BH
20Hâ2BH
30Hâ3BH
40Hâ4BH
20Hâ2BH
30Hâ3BH
40Hâ4BH
00Hâ0BH
30Hâ3BH
40Hâ4BH
00Hâ0BH
10Hâ1BH
40Hâ4BH
00Hâ0BH
10Hâ1BH
20Hâ2BH
Character Generator ROM (CGROM)
The character generator ROM generates 5 Ã 8-dot character patterns from 8-bit character codes (Table 5).
It can generate 240 5 Ã 8-dot character patterns. User-defined character patterns are also available using a
mask-programmed ROM (see the Modifying Character Patterns section.)
Character Generator RAM (CGRAM)
The character generator RAM of 32 Ã 5 bits allows the user to redefine the character patterns for user
fonts. In the case of 5 Ã 8-dot characters, up to four fonts may be redefined.
Write the character codes at addresses 00H to 03H into DDRAM to display the character patterns stored
in CGRAM.
Segment RAM (SEGRAM)
The segment RAM is used to enable control of segments such as an icon and a mark by the user program.
Segments and characters are driven by a multiplexing drive method.
SEGRAM has a capacity of 8 Ã 5 bits, for controlling the display of a maximum of 40 icons and marks.
While COMS1 and COMS2 outputs are being selected, SEGRAM is read and segments (icons and marks)
are displayed by a multiplexing drive method (20 segments each during COMS1 and COMS2 selection).
Bits in SEGRAM corresponding to segments to be displayed are directly set by the MPU, regardless of
the contents of DDRAM and CGRAM.
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