HD66717 Datasheet, PDF (41/90 Pages) Hitachi Semiconductor – (Low-Power Dot-Matrix Liquid Crystal Display Controller/Driver)

HD66717
Reset Function
Initializing by Internal Reset Circuit
The HD66717 is internally initialized by RESET input. During reset, the system executes the instructions
as described below. Here, the busy flag (BF) therefore indicates a busy state (BF = 1), accepting no
instruction or RAM data access from the MPU. Here, reset input must be held at least 10 ms.
After releasing power-on reset, clear display instruction is operated, so wait for 1,000 clock-cycles or
more.
Make sure to reset the HD66717 immediately after power-on reset in I²C bus mode.
1. Instruction set initialization
a. Clear display:
Writes 20H to DDRAM after releasing reset
b. Return home
Sets the address counter (AC) to 00H to select the DDRAM
c. Start oscillator
d. Entry mode
I/D = 1: Increment by 1
OSC = 0: Clock frequency not divided
e. Cursor control
B/W = 0: White-black inverting cursor off
C = 0: 8th raster-row cursor off
B = 0: Blink cursor off
f. Display on/off control
DC = 0: Character display off
DS = 0: Segment display off
LC = 0: Line-cursor off
g. Power control
AMP = 0: LCD power supply off
SLP = 0: Sleep mode off
STB = 0: Standby mode off
h. Display control
NL1, NL0 = 11: 4-line display (1/34 multiplexing duty ratio)
DL3–DL1 = 000: Double-height display off
i. Contrast adjust
CT = 0000: Weak contrast
j. Scroll control
SN2–SN0 = 000: First line displayed at the top
SL2–SL0 = 000: First raster-row displayed at the top of the first line
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