MB82DBS02163C Datasheet, PDF (45/63 Pages) Fujitsu Component Limited. – 32 M Bit (2 M word×16 bit) Mobile Phone Application Specific Memory

MB82DBS02163C-70L
(20) Synchronous Read Timing #1 (OE Control)
RL = 5
CLK
Address
ADV
tASVL
Address
Valid
tAHV
tVSCK
tCKVH
tASCL
tVPL
CE1
tCLCK
tRCB
OE
tOLQ
WE
High
LB, UB
WAIT
High-Z
DQ
High-Z
tBLQ
tCKTV
tOLTL
tOLZ
tCKTX
tAC
tAC
Q1
tCKQX
tASVL
Address
Valid
tVSCK tCKVH
tVHVL
tASCL
tVPL
tCKOH
tCLCK
tCP
tCKBH
tCKTV
tOHTZ
tAC tCKTX ^tOHZ
QBL
tCKQX
Note : This timing diagram assumes CE2 = H, the valid clock edge on rising edge and BL = 8 or 16.
45