English
Language : 

MC68HC05C9A Datasheet, PDF (96/124 Pages) Freescale Semiconductor, Inc – Microcontrollers
Electrical Specifications
NOTE 1
VDD
OSC1 PIN(2)
INTERNAL
CLOCK(3)
4064 tCYC
INTERNAL
ADDRESS BUS(3)
$3FFE
$3FFE
$3FFE
$3FFE
$3FFE
$3FFE
$3FFF
INTERNAL
DATA BUS(3)
RESET PIN
NOTE 4
Notes:
1. Power-on reset threshold is typically between 1 V and 2 V.
2. OSC1 line is meant to represent time only, not frequency.
3. Internal clock, internal address bus, and internal data bus are not available externally.
4. RESET outputs VOL during 4064 POR cycles.
Figure 12-7. Power-On Reset Timing Diagram
NEW
NEW
PCH
PCL
INTERNAL
CLOCK(1)
INTERNAL
ADDRESS BUS(1)
INTERNAL
DATA BUS(1)
RESET(2)
$3FFE
$3FFE
$3FFE
$3FFE
$3FFF NEW PC
NEW
NEW
OP
PCH
PCL
CODE
tRL
Notes:
1. Internal clock, internal address bus, and internal data bus are not available externally.
2. The next rising edge of the internal clock after the rising edge of RESET initiates the reset sequence.
Figure 12-8. External Reset Timing
MC68HC05C9A Advance Information Data Sheet, Rev. 5.1
96
Freescale Semiconductor