MC68HC05C9A Datasheet, PDF (45/124 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 8
Capture/Compare Timer
8.1 Introduction
This section describes the operation of the 16-bit capture/compare timer. Figure 8-1 shows the structure
of the capture/compare subsystem.
INTERNAL BUS
HIGH LOW
BYTE BYTE
INTERNAL
PROCESSOR
CLOCK
8-BIT
BUFFER
$16
$17
OUTPUT
COMPARE
REGISTER
÷4
HIGH
BYTE
LOW
BYTE
16-BIT FREE
RUNNING
$18
$19
COUNTER
COUNTER
ALTERNATE
REGISTER
$1A
$1B
HIGH LOW
BYTE BYTE
INPUT
CAPTURE
REGISTER
$14
$15
OUTPUT
COMPARE
CIRCUIT
OVERFLOW
DETECT
CIRCUIT
EDGE
DETECT
CIRCUIT
TIMER
STATUS
REG.
ICF OCF
TOF
$13
INTERRUPT CIRCUIT
DQ
OUTPUT ^CLK
LEVEL
REG. C
TIMER
ICIE
OCIE
TOIE IEDG OLVL
CONTROL
REG.
$12
RESET
OUTPUT EDGE
LEVEL INPUT
(TCMP) (TCAP)
Figure 8-1. Capture/Compare Timer Block Diagram
MC68HC05C9A Advance Information Data Sheet, Rev. 5.1
Freescale Semiconductor
45