MC68HC05C9A Datasheet, PDF (113/124 Pages) Freescale Semiconductor, Inc – Microcontrollers

Control Timing
B.4 Control Timing
The data in 12.7 5.0-Volt Control Timing and 12.8 3.3-Volt Control Timing applies to the MC68HSC05C9A
with the exceptions given here.
B.4.1 4.5–5.5-Volt High-Speed Control Timing
Characteristic⁽¹⁾
Symbol
Min
Max Unit
Oscillator frequency
Crystal
External clock
Internal operating frequency (f_OSC ÷ 2)
Crystal
External clock
f_OSC
f_OP
—
8.2
MHz
dc
8.2
—
4.1
MHz
dc
4.1
Cycle time
Crystal oscillator startup time
Stop recovery startup time
RESET pulse width
t_cyc
t_OXOV
t_ILCH
t_RL
244
—
ns
100
ms
100
ms
1.5
—
t_cyc
Timer
Resolution⁽²⁾
Input capture pulse width
Input capture pulse width
Interrupt pulse width low (edge-triggered)
Interrupt pulse period
t_RESL
t_TH or t_TL
t_THTl
t_ILIH
t_ILIL
4.0
64
Note⁽³⁾
64
Note⁽⁴⁾
—
t_cyc
—
ns
—
t_cyc
—
ns
—
t_cyc
OSC1 pulse width
t_OH or t_OL
50
—
ns
1. V_DD = 4.5–5.5 Vdc
2. Because a 2-bit prescaler in the timer must count four internal cycles (t_cyc), this is the limiting minimum factor in determining
the timer resolution.
3. The minimum period t_TLTL should not be less than the number of cycle times it takes to execute the capture interrupt service
routine plus 24 t_cyc.
4. The minimum t_ILIL should not be less than the number of cycle times it takes to execute the interrupt service routine plus
19 t_cyc.
MC68HC05C9A Advance Information Data Sheet, Rev. 5.1
Freescale Semiconductor
113