MC68HC05C9A Datasheet, PDF (63/124 Pages) Freescale Semiconductor, Inc – Microcontrollers

SCI I/O Registers
NF — Receiver Noise Flag
This clearable, read-only flag is set when noise is detected in data received in the SCI data register.
Clear the NF bit by reading the SCSR and then reading the SCDR.
1 = Noise detected in SCDR
0 = No noise detected in SCDR
FE — Receiver Framing Error Flag
This clearable, read-only flag is set when there is a logic 0 where a stop bit should be in the character
shifted into the receive shift register. If the received word causes both a framing error and an overrun
error, the OR flag is set and the FE flag is not set. Clear the FE bit by reading the SCSR and then
reading the SCDR.
1 = Framing error
0 = No framing error
9.11.5 Baud Rate Register
The baud rate register (BAUD), shown in Figure 9-12, selects the baud rate for both the receiver and the
transmitter.
Address: $000D
Bit 7
Read:
Write:
Reset: —
6
5
4
3
2
SCP1
SCP0
SCR2
—
0
0
—
U
= Unimplemented
U = Unaffected
Figure 9-12. Baud Rate Register (BAUD)
1
SCR1
U
Bit 0
SCR0
U
SCP1 — SCP0–SCI Prescaler Select Bits
These read/write bits control prescaling of the baud rate generator clock, as shown in Table 9-1. Reset
clears both SCP1 and SCP0.
Table 9-1. Baud Rate Generator Clock Prescaling
SCP1 and SCP0
00
01
10
11
Baud Rate Generator Clock
Internal clock ÷ 1
Internal clock ÷ 3
Internal clock ÷ 4
Internal clock ÷ 13
MC68HC05C9A Advance Information Data Sheet, Rev. 5.1
Freescale Semiconductor
63