MC9S08QE16CLC Datasheet, PDF (92/350 Pages) Freescale Semiconductor, Inc – Low-power wireless applications, Gas, water and heater meters

Chapter 6 Parallel Input/Output
6.6.4 Port B Pin Control Registers (PTBPE, PTBSE, PTBDS)
In addition to the I/O control, port B pins are controlled by the registers listed below.
R
W
Reset
7
PTBPE7
0
6
PTBPE6
5
PTBPE5
4
PTBPE4
3
PTBPE3
2
PTBPE2
0
0
0
0
0
Figure 6-9. Internal Pullup Enable for Port B (PTBPE)
1
PTBPE1
0
0
PTBPE0
0
Table 6-8. PTBPE Register Field Descriptions
Field
Description
7:0
PTBPE[7:0]
Internal Pullup Enable for Port B Bits — Each of these control bits determines if the internal pullup device is
enabled for the associated PTB pin. For port B pins that are configured as outputs, these bits have no effect and
the internal pullup devices are disabled.
0 Internal pullup device disabled for port B bit n.
1 Internal pullup device enabled for port B bit n.
R
W
Reset
7
PTBSE7
0
6
PTBSE6
5
PTBSE5
4
PTBSE4
3
PTBSE3
2
PTBSE2
1
PTBSE1
0
0
0
0
0
0
Figure 6-10. Output Slew Rate Control Enable (PTBSE)
0
PTBSE0
0
Table 6-9. PTBSE Register Field Descriptions
Field
Description
7:0
PTBSE[7:0]
Output Slew Rate Control Enable for Port B Bits— Each of these control bits determine whether output slew
rate control is enabled for the associated PTB pin. For port B pins that are configured as inputs, these bits have
no effect.
0 Output slew rate control disabled for port B bit n.
1 Output slew rate control enabled for port B bit n.
MC9S08AC60 Series Data Sheet, Rev. 3
92
Freescale Semiconductor