MC9S08QE16CLC Datasheet, PDF (83/350 Pages) Freescale Semiconductor, Inc – Low-power wireless applications, Gas, water and heater meters

Chapter 5 Resets, Interrupts, and System Configuration
5.9.10 System Options Register 2 (SOPT2)
This high page register contains bits to configure MCU specific features on the MC9S08AC60 Series
devices.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
COPCLKS¹
TPMCCFG
W
Reset:
1
0
0
0
1
0
0
0
= Unimplemented or Reserved
Figure 5-12. System Options Register 2 (SOPT2)
1 _{This bit can be written only one time after reset. Additional writes are ignored.}
Table 5-14. SOPT2 Register Field Descriptions
Field
Description
7
COP Watchdog Clock Select — This write-once bit selects the clock source of the COP watchdog.
COPCLKS 0 Internal 1-kHz clock is source to COP.
1 Bus clock is source to COP.
3
TPM Clock Configuration — Configures the timer/pulse-width modulator clock signal.
TPMCCFG 0 TPMCLK is available to TPM1, TPM2, and TPM3 via the IRQ pin; TPMCLK1 and TPMCLK2 are not available.
1 TPM1CLK, TPM2CLK, and TPMCLK are available to TPM1, TPM2, and TPM3 respectively.
MC9S08AC60 Series Data Sheet, Rev. 3
Freescale Semiconductor
83