MC9S08QE16CLC Datasheet, PDF (185/350 Pages) Freescale Semiconductor, Inc – Low-power wireless applications, Gas, water and heater meters

Internal Clock Generator (S08ICGV4)
Table 10-12. MFD and RFD Decode Table
101
14
110
16
111
18
101
32
110
64
111
128
10.5.2 Example #1: External Crystal = 32 kHz, Bus Frequency = 4.19 MHz
In this example, the FLL will be used (in FEE mode) to multiply the external 32 kHz oscillator up to
8.38 MHz to achieve 4.19 MHz bus frequency.
After the MCU is released from reset, the ICG is in self-clocked mode (SCM) and supplies approximately
8 MHz on ICGOUT, which corresponds to a 4 MHz bus frequency (f_Bus).
The clock scheme will be FLL engaged, external (FEE). So
f_ICGOUT = f_ext * P * N / R ; P = 64, f_ext = 32 kHz
Solving for N / R gives:
Eqn. 10-1
N / R = 8.38 MHz /(32 kHz * 64) = 4 ; we can choose N = 4 and R =1
Eqn. 10-2
The values needed in each register to set up the desired operation are:
ICGC1 = $38 (%00111000)
Bit 7 HGO
0
Bit 6 RANGE 0
Bit 5 REFS
1
Bits 4:3 CLKS
11
Bit 2 OSCSTEN 0
Bit 1 LOCD 0
Bit 0
0
Configures oscillator for low power
Configures oscillator for low-frequency range; FLL prescale factor is 64
Oscillator using crystal or resonator is requested
FLL engaged, external reference clock mode
Oscillator disabled
Loss-of-clock detection enabled
Unimplemented or reserved, always reads zero
ICGC2 = $00 (%00000000)
Bit 7 LOLRE
Bits 6:4 MFD
Bit 3 LOCRE
Bits 2:0 RFD
0 Generates an interrupt request on loss of lock
000 Sets the MFD multiplication factor to 4
0 Generates an interrupt request on loss of clock
000 Sets the RFD division factor to 1
ICGS1 = $xx
This is read only except for clearing interrupt flag
ICGS2 = $xx
This is read only; should read DCOS = 1 before performing any time critical tasks
ICGFLTLU/L = $xx
Only needed in self-clocked mode; FLT will be adjusted by loop to give 8.38 MHz DCO clock
Bits 15:12 unused 0000
MC9S08AC60 Series Data Sheet, Rev. 3
Freescale Semiconductor
185