MC9S08SG8 Datasheet, PDF (87/310 Pages) Freescale Semiconductor, Inc – Microcontrollers

6.6.3.3 Port C Pull Enable Register (PTCPE)
Chapter 6 Parallel Input/Output Control
7
R
0
W
Reset:
0
6
5
4
3
2
1
0
0
0
PTCPE3
PTCPE2
PTCPE1
0
0
0
0
0
0
Figure 6-21. Internal Pull Enable for Port C Register (PTCPE)
Table 6-20. PTCPE Register Field Descriptions
0
PTCPE0
0
Field
Description
3:0
PTCPE[3:0]
Internal Pull Enable for Port C Bits — Each of these control bits determines if the internal pull-up device is
enabled for the associated PTC pin. For port C pins that are configured as outputs, these bits have no effect and
the internal pull devices are disabled.
0 Internal pull-up device disabled for port C bit n.
1 Internal pull-up device enabled for port C bit n.
6.6.3.4 Port C Slew Rate Enable Register (PTCSE)
7
R
0
W
Reset:
0
6
5
4
3
2
1
0
0
0
PTCSE3
PTCSE2
PTCSE1
0
0
0
1
1
1
Figure 6-22. Slew Rate Enable for Port C Register (PTCSE)
Table 6-21. PTCSE Register Field Descriptions
0
PTCSE0
1
Field
Description
3:0
PTCSE[3:0]
Output Slew Rate Enable for Port C Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTC pin. For port C pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port C bit n.
1 Output slew rate control enabled for port C bit n.
MC9S08SG8 MCU Series Data Sheet, Rev. 0
Freescale Semiconductor
PRELIMINARY
87