MC9S08SG8 Datasheet, PDF (81/310 Pages) Freescale Semiconductor, Inc – Microcontrollers

6.6.1.7
Port A Interrupt Pin Select Register (PTAPS)
Chapter 6 Parallel Input/Output Control
7
R
0
W
Reset:
0
6
5
4
3
2
1
0
0
0
PTAPS3
PTAPS2
PTAPS1
0
0
0
0
0
0
Figure 6-9. Port A Interrupt Pin Select Register (PTAPS)
Table 6-8. PTAPS Register Field Descriptions
0
PTAPS0
0
Field
Description
3:0
Port A Interrupt Pin Selects — Each of the PTAPSn bits enable the corresponding port A interrupt pin.
PTAPS[3:0] 0 Pin not enabled as interrupt.
1 Pin enabled as interrupt.
6.6.1.8 Port A Interrupt Edge Select Register (PTAES)
7
R
0
W
Reset:
0
6
5
4
3
2
0
0
0
PTAES3
PTAES2
0
0
0
0
0
Figure 6-10. Port A Edge Select Register (PTAES)
Table 6-9. PTAES Register Field Descriptions
1
PTAES1
0
0
PTAES0
0
Field
Description
3:0
PTAES[3:0]
Port A Edge Selects — Each of the PTAESn bits serves a dual purpose by selecting the polarity of the active
interrupt edge as well as selecting a pull-up or pull-down device if enabled.
0 A pull-up device is connected to the associated pin and detects falling edge/low level for interrupt generation.
1 A pull-down device is connected to the associated pin and detects rising edge/high level for interrupt
generation.
MC9S08SG8 MCU Series Data Sheet, Rev. 0
Freescale Semiconductor
PRELIMINARY
81