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MC9328MX1 Datasheet, PDF (70/96 Pages) Freescale Semiconductor, Inc – i.MX Integrated Portable System Processor
Specifications
Table 31. Timing Values for Figure 48 through Figure 52
Parameter
Symbol
Minimum
Maximum
MMC/SD bus clock, CLK (All values are referred to minimum (VIH) and maximum (VIL)
Command response cycle
NCR
2
64
Identification response cycle
NID
5
5
Access time delay cycle
NAC
2
TAAC + NSAC
Command read cycle
NRC
8
–
Command-command cycle
NCC
8
–
Command write cycle
NWR
2
–
Stop transmission cycle
NST
2
2
TAAC: Data read access time -1 defined in CSD register bit[119:112]
NSAC: Data read access time -2 in CLK cycles (NSAC·100) defined in CSD register bit[111:104]
Unit
Clock cycles
Clock cycles
Clock cycles
Clock cycles
Clock cycles
Clock cycles
Clock cycles
3.15.2 SDIO-IRQ and ReadWait Service Handling
In SDIO, there is a 1-bit or 4-bit interrupt response from the SDIO peripheral card. In 1-bit mode, the interrupt
response is simply that the SD_DAT[1] line is held low. The SD_DAT[1] line is not used as data in this mode. The
memory controller generates an interrupt according to this low and the system interrupt continues until the source
is removed (SD_DAT[1] returns to its high level).
In 4-bit mode, the interrupt is less simple. The interrupt triggers at a particular period called the "Interrupt Period"
during the data access, and the controller must sample SD_DAT[1] during this short period to determine the IRQ
status of the attached card. The interrupt period only happens at the boundary of each block (512 bytes).
CMD S T Content CRC E Z Z P S Response E Z Z Z
******
ZZZ
DAT[1]
For 4-bit
Interrupt Period
S Block Data E
IRQ
S Block Data E
IRQ
LH
DAT[1]
For 1-bit
Interrupt Period
Figure 53. SDIO IRQ Timing Diagram
ReadWait is another feature in SDIO that allows the user to submit commands during the data transfer. In this
mode, the block temporarily pauses the data transfer operation counter and related status, yet keeps the clock
running, and allows the user to submit commands as normal. After all commands are submitted, the user can switch
back to the data transfer operation and all counter and status values are resumed as access continues.
MC9328MX1 Advance Information, Rev. 4
70
Freescale Semiconductor