S912XET256J2MAL Datasheet, PDF (677/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Chapter 18
Periodic Interrupt Timer (S12PIT24B4CV2)
Table 18-1. Revision History
Revision
Number
V01.00
V01.01
Revision
Date
28 Apr 2005
05 Jul 2005
Sections
Affected
18.6/18-690
Description of Changes
- Initial Release
- Added application section.
- Removed table 1-1
18.1 Introduction
The period interrupt timer (PIT) is an array of 24-bit timers that can be used to trigger peripheral modules
or raise periodic interrupts. Refer to Figure 18-1 for a simplified block diagram.
18.1.1 Glossary
PIT
ISR
CCR
SoC
micro time bases
Acronyms and Abbreviations
Periodic Interrupt Timer
Interrupt Service Routine
Condition Code Register
System on Chip
clock periods of the 16-bit timer modulus down-counters, which are generated by the 8-bit
modulus down-counters.
18.1.2 Features
The PIT includes these features:
• Four timers implemented as modulus down-counters with independent time-out periods.
• Time-out periods selectable between 1 and 2²⁴ bus clock cycles. Time-out equals m*n bus clock
cycles with 1 <= m <= 256 and 1 <= n <= 65536.
• Timers that can be enabled individually.
• Four time-out interrupts.
• Four time-out trigger output signals available to trigger peripheral modules.
• Start of timer channels can be aligned to each other.
18.1.3 Modes of Operation
Refer to the device overview for a detailed explanation of the chip modes.
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
677