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S912XET256J2MAL Datasheet, PDF (625/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family | |||
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Chapter 16 Freescaleâs Scalable Controller Area Network (S12MSCANV3)
Table 16-18. CANIDAC Register Field Descriptions
Field
Description
5-4
Identiï¬er Acceptance Mode â The CPU sets these ï¬ags to deï¬ne the identiï¬er acceptance ï¬lter organization
IDAM[1:0] (see Section 16.4.3, âIdentiï¬er Acceptance Filterâ). Table 16-19 summarizes the different settings. In ï¬lter closed
mode, no message is accepted such that the foreground buffer is never reloaded.
2-0
Identiï¬er Acceptance Hit Indicator â The MSCAN sets these ï¬ags to indicate an identiï¬er acceptance hit (see
IDHIT[2:0] Section 16.4.3, âIdentiï¬er Acceptance Filterâ). Table 16-20 summarizes the different settings.
IDAM1
0
0
1
1
Table 16-19. Identiï¬er Acceptance Mode Settings
IDAM0
0
1
0
1
Identiï¬er Acceptance Mode
Two 32-bit acceptance ï¬lters
Four 16-bit acceptance ï¬lters
Eight 8-bit acceptance ï¬lters
Filter closed
Table 16-20. Identiï¬er Acceptance Hit Indication
IDHIT2
0
0
0
0
1
1
1
1
IDHIT1
0
0
1
1
0
0
1
1
IDHIT0
0
1
0
1
0
1
0
1
Identiï¬er Acceptance Hit
Filter 0 hit
Filter 1 hit
Filter 2 hit
Filter 3 hit
Filter 4 hit
Filter 5 hit
Filter 6 hit
Filter 7 hit
The IDHITx indicators are always related to the message in the foreground buffer (RxFG). When a
message gets shifted into the foreground buffer of the receiver FIFO the indicators are updated as well.
16.3.2.13 MSCAN Reserved Register
This register is reserved for factory testing of the MSCAN module and is not available in normal system
operating modes.
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
625
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