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S912XET256J2MAL Datasheet, PDF (611/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family | |||
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Chapter 16 Freescaleâs Scalable Controller Area Network (S12MSCANV3)
Register
Name
0x000F
CANTXERR
Bit 7
6
5
4
3
2
1
Bit 0
R TXERR7
W
TXERR6
TXERR5
TXERR4
TXERR3
TXERR2
TXERR1
TXERR0
0x0010â0x0013 R
CANIDAR0â3 W AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
0x0014â0x0017 R
CANIDMRx
W
AM7
AM6
AM5
AM4
AM3
AM2
AM1
AM0
0x0018â0x001B R
CANIDAR4â7 W AC7
AC6
AC5
AC4
AC3
AC2
AC1
AC0
0x001Câ0x001F R
CANIDMR4â7 W
AM7
AM6
AM5
AM4
AM3
AM2
AM1
AM0
0x0020â0x002F R
CANRXFG
W
See Section 16.3.3, âProgrammerâs Model of Message Storageâ
0x0030â0x003F R
CANTXFG
W
See Section 16.3.3, âProgrammerâs Model of Message Storageâ
= Unimplemented or Reserved
Figure 16-3. MSCAN Register Summary (continued)
16.3.2 Register Descriptions
This section describes in detail all the registers and register bits in the MSCAN module. Each description
includes a standard register diagram with an associated ï¬gure number. Details of register bit and ï¬eld
function follow the register diagrams, in bit order. All bits of all registers in this module are completely
synchronous to internal clocks during a register read.
16.3.2.1 MSCAN Control Register 0 (CANCTL0)
The CANCTL0 register provides various control bits of the MSCAN module as described below.
Module Base + 0x0000
R
W
Reset:
7
RXFRM
0
6
RXACT
5
CSWAI
4
SYNCH
3
TIME
2
WUPE
0
0
0
0
0
= Unimplemented
Figure 16-4. MSCAN Control Register 0 (CANCTL0)
Access: User read/write(1)
1
0
SLPRQ
INITRQ
0
1
MC9S12XE-Family Reference Manual Rev. 1.25
Freescale Semiconductor
611
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