S912XET256J2MAL Datasheet, PDF (1281/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Appendix E Detailed Register Address Map
0x00B0–0x00B7 Inter IC Bus (IIC1) Map
Address
0x00B0
0x00B1
0x00B2
0x00B3
0x00B4
0x00B5
0x00B6
0x00B7
Name
IBAD
IBFD
IBCR
IBSR
IBDR
IBCR2
Reserved
Reserved
Bit 7
R
ADR7
W
R
IBC7
W
R
IBEN
W
R TCF
W
R
D7
W
R
GCEN
W
R
0
W
R
0
W
Bit 6
ADR6
IBC6
IBIE
IAAS
D6
ADTYPE
0
0
Bit 5
ADR5
IBC5
MS/SL
IBB
D5
0
0
0
Bit 4
ADR4
IBC4
TX/RX
IBAL
D4
0
0
0
Bit 3
ADR3
IBC3
TXAK
0
D3
0
0
0
Bit 2
ADR2
IBC2
0
RSTA
SRW
D2
ADR10
0
0
Bit 1
ADR1
IBC1
0
IBIF
D1
ADR9
0
0
Bit 0
0
IBC0
IBSWAI
RXAK
D0
ADR8
0
0
0x00B8–0x00BF Asynchronous Serial Interface (SCI2) Map
Address Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
0x00B8 SCI2BDH^{(1) R} IREN
W
TNP1
TNP0 SBR12 SBR11
0x00B9
SCI2BDL^{1 R} SBR7
W
SBR6
SBR5
SBR4
SBR3
0x00BA
SCI2CR1¹
R
LOOPS
SCISWAI
RSRC
M
WAKE
W
0x00B8
SCI2ASR1⁽²⁾
R
RXEDGIF
0
0
0
0
W
0x00B9
SCI2ACR1²
R
RXEDGIE
0
0
0
0
W
0x00BA SCI2ACR2^{2 R}
0
0
0
0
0
W
R
0x00BB SCI2CR2
TIE
TCIE
RIE
ILIE
TE
W
R TDRE
TC
RDRF
IDLE
OR
0x00BC SCI2SR1
W
R
0
0x00BD SCI2SR2
AMAP
W
0
TXPOL RXPOL
R R8
0
0
0
0x00BE SCI2DRH
T8
W
R R7
R6
R5
R4
R3
0x00BF SCI2DRL
W T7
T6
T5
T4
T3
1. Those registers are accessible if the AMAP bit in the SCI2SR2 register is set to zero
2. Those registers are accessible if the AMAP bit in the SCI2SR2 register is set to one
Bit 2
SBR10
Bit 1
SBR9
SBR2
SBR1
ILT
PE
BERRV
0
BERRIF
BERRIE
BERRM1 BERRM0
RE
RWU
NF
FE
BRK13
0
TXDIR
0
R2
R1
T2
T1
Bit 0
SBR8
SBR0
PT
BKDIF
BKDIE
BKDFE
SBK
PF
RAF
0
R0
T0
Freescale Semiconductor
MC9S12XE-Family Reference Manual Rev. 1.25
1281