S912XET256J2MAL Datasheet, PDF (202/1324 Pages) Freescale Semiconductor, Inc – MC9S12XEP100 Reference Manual Covers MC9S12XE Family

Chapter 3 Memory Mapping Control (S12XMMCV4)
The fixed 16K page from 0x4000–0x7FFF (when ROMHM = 0) is the page number 0xFD.
The reset value of 0xFE ensures that there is linear Flash space available between addresses 0x4000 and
0xFFFF out of reset.
The fixed 16K page from 0xC000-0xFFFF is the page number 0xFF.
3.3.2.7 RAM Page Index Register (RPAGE)
Address: 0x0016
R
W
Reset
7
RP7
1
6
RP6
1
5
RP5
1
4
RP4
1
3
RP3
1
2
RP2
1
1
RP1
0
0
RP0
1
Figure 3-13. RAM Page Index Register (RPAGE)
Read: Anytime
Write: Anytime
These eight index bits are used to page 4 KByte blocks into the RAM page window located in the local
(CPU or BDM) memory map from address 0x1000 to address 0x1FFF (see Figure 3-14). This supports
accessing up to 1022 KByte of RAM (in the Global map) within the 64 KByte Local map. The RAM page
index register is effectively used to construct paged RAM addresses in the Local map format.
CAUTION
XGATE write access to this register during an CPU access which makes use
of this register could lead to unexpected results.
Global Address [22:0]
0 0 0 ^{Bit19 Bit18}
Bit12 Bit11
Bit0
RPAGE Register [7:0]
Address [11:0]
Address: CPU Local Address
or BDM Local Address
Figure 3-14. RPAGE Address Mapping
NOTE
Because RAM page 0 has the same global address as the register space, it is
possible to write to registers through the RAM space when RPAGE = 0x00.
MC9S12XE-Family Reference Manual Rev. 1.25
202
Freescale Semiconductor