S9S12GN32F0MLC Datasheet, PDF (249/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Port Integration Module (S12GPIMV1)
2.5.2.6 Wired-Or Mode Register (WOMx)
If the pin is used as an output this register turns off the active-high drive. This allows wired-or type
connections of outputs.
2.5.2.7 Interrupt Enable Register (PIEx)
If the pin is used as an interrupt input this register serves as a mask to the interrupt flag to enable/disable
the interrupt.
2.5.2.8 Interrupt Flag Register (PIFx)
If the pin is used as an interrupt input this register holds the interrupt flag after a valid pin event.
2.5.2.9 Pin Routing Register (PRRx)
This register allows software re-configuration of the pinouts for specific peripherals in the 20 TSSOP
package only.
2.5.2.10 Package Code Register (PKGCR)
This register determines the package in use. Pre programmed by factory.
2.5.3 Pin Configuration Summary
The following table summarizes the effect of the various configuration bits, that is data direction (DDR),
output level (IO), pull enable (PE), pull select (PS) on the pin function and pull device ¹.
The configuration bit PS is used for two purposes:
1. Configure the sensitive interrupt edge (rising or falling), if interrupt is enabled.
2. Select either a pullup or pulldown device if PE is active.
1.
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
251