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S9S12GN32F0MLC Datasheet, PDF (1228/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet | |||
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Electrical Characteristics
FTMRG128K1, FTMRG96K1:
tuns â 100070 â
-f-N----V--1-M----O---P-- + 33500 â
f--N----V---M-1---B---U---S-
FTMRG64K1, FTMRG48K1:
tuns â 100070 â
f--N----V--1-M----O---P-- + 18300 â
f--N----V---M-1---B---U---S-
FTMRG32K1, FTMRG16K1:
tuns â 100070 â
-f-N----V--1-M----O---P-- + 9600 â
f--N----V---M-1---B---U---S-
A.7.1.11 Verify Backdoor Access Key (FCMD=0x0C)
The maximum verify backdoor access key time is given by:
t = 520 â
f--N----V---M-1---B---U---S-
A.7.1.12 Set User Margin Level (FCMD=0x0D)
The maximum set user margin level time is given by:
t = 500 â
f--N----V---M-1---B---U---S-
A.7.1.13 Set Field Margin Level (FCMD=0x0E)
The maximum set ï¬eld margin level time is given by:
t = 510 â
f--N----V---M-1---B---U---S-
A.7.1.14 Erase Verify EEPROM Section (FCMD=0x10)
The time required to Erase Verify EEPROM for a given number of words NW is given by:
tdcheck â (520 + NW) â
f--N----V---M-1---B---U---S-
1230
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
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