S9S12GN32F0MLC Datasheet, PDF (229/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Port Integration Module (S12GPIMV1)
Table 2-64. PERP Register Field Descriptions
Field
7-0
PERP
Description
Port P pull device enable—Enable pull device on input pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
no effect. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
2.4.3.38 Port P Polarity Select Register (PPSP)
Address 0x025D (G1, G2)
7
R
PPSP7
W
Reset
0
Address 0x025D (G3)
6
PPSP6
0
5
PPSP5
0
4
PPSP4
0
3
PPSP3
0
2
PPSP2
0
7
R
0
W
Reset
0
1 _{Read: Anytime}
Write: Anytime
6
5
4
3
2
0
PPSP5
PPSP4
PPSP3
PPSP2
0
0
0
0
0
Figure 2-39. Port P Polarity Select Register (PPSP)
Access: User read/write¹
1
0
PPSP1
PPSP0
0
0
Access: User read/write¹
1
0
PPSP1
PPSP0
0
0
Table 2-65. PPSP Register Field Descriptions
Field
7-0
PPSP
Description
Port P pull device select—Configure pull device and pin interrupt edge polarity on input pin
This bit selects a pullup or a pulldown device if enabled on the associated port input pin.
This bit also selects the polarity of the active pin interrupt edge.
1 Pulldown device selected; rising edge selected
0 Pullup device selected; falling edge selected
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
231