S9S12GN32F0MLC Datasheet, PDF (1238/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Electrical Characteristics
A.12 Electrical Specification for Voltage Regulator
Table A-43. Voltage Regulator Characteristics (Junction Temperature From –40°C To +150°C)
Num C
Characteristic
Symbol
Min
Typical
Max
Unit
1
P Input Voltages
V_VDDR,A
3.13
2
P
V_DDA Low Voltage Interrupt Assert Level ¹
V_DDA Low Voltage Interrupt Deassert Level
V_LVIA
V_LVID
4.04
4.19
3
P
V_DDX Low Voltage Reset Deassert ^{2 3 4}
V_LVRXD
—
4
P
V_DDX Low Voltage Reset Assert ^{2 3 4}
V_LVRXA
2.95
5
T
CPMU ACLK frequency
(CPMUACLKTR[5:0] = %000000)
f_ACLK
—
6
C
Trimmed ACLK internal clock⁵ ∆f / f_nominal
df_ACLK
- 5%
7
The first period after enabling the counter
D by APIFE might be reduced by ACLK start
t_sdel
—
up delay
8
D
The first period after enabling the COP
might be reduced by ACLK start up delay
t_sdel
—
9
Output Voltage Flash
P
Full Performance Mode
V_DDF
2.6
Reduced Power Mode (MCU STOP mode)
1.1
—
4.23
4.38
3.05
3.02
10
—
—
—
2.82
1.6
5.5
V
4.40
V
4.49
V
3.13
V
—
V
—
KHz
+ 5%
—
100
us
100
us
2.9
V
1.98
V
10
V_DDF Voltage Distribution
C
over input voltage V_DDA6
4.5V ≤ V_DDA ≤ 5.5V, T_A = 27^oC
compared to V_DDA = 5.0V
∆_VDDF
-5
0
5
mV
11
V_DDF Voltage Distribution
over ambient temperature T_A
C
V_DDA = 5V, -40°C ≤ T_A ≤ 125°C
compared to V_DDF production test value
∆_VDDF
-20
-
+20
mV
(see A.16, “ADC Conversion Result
Reference”)
1 _{Monitors VDDA, active only in Full Performance Mode. Indicates I/O & ADC performance degradation due to low supply}
voltage.
2 _{Device functionality is guaranteed on power down to the LVR assert level}
3 _{Monitors VDDX, active only in Full Performance Mode. MCU is monitored by the POR in RPM (see Figure A-6)}
4 _{VLVRXA < VLVRXD. The hysteresis is unspecified and untested.}
5 _{The ACLK Trimming CPMUACLKTR[5:0] bits must be set so that fACLK=10KHz.}
6 _{VDDR ≥ 3.13V}
1240
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor