S9S12GN32F0MLC Datasheet, PDF (157/1292 Pages) Freescale Semiconductor, Inc – MC9S12G Family Reference Manual and Data Sheet

Port Integration Module (S12GPIMV1)
• Control register for free-running clock outputs
•
A standard port pin has the following minimum features:
• Input/output selection
• 3.15 V - 5 V digital and analog input
• Input with selectable pullup or pulldown device
Optional features supported on dedicated pins:
• Open drain for wired-or connections
• Key-wakeup feature: External pin interrupt with glitch filtering, which can also be used for wakeup
from stop mode.
2.1.4
Block Diagram
n
1
0
Figure 2-1. Block Diagram
Peripheral
Module
Pin Enable, Data
PIM
Routing
Data
Control
Data
PIM
Ports
Pin Enable, Data
Package Code
Pin Routing (20 TSSOP only)
Control
Pin #0
Pin #n
2.2 PIM Routing - External Signal Description
This section lists and describes the signals that do connect off-chip.
Table 2-3 shows the availability of I/O port pins for each group in the largest offered package option.
Table 2-3. Port Pin Availability (in largest package) per Device
Device Group
Port
G1
G2
G3
(100 pin)
(64 pin)
(48 pin)
A
7-0
-
-
B
7-0
-
-
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
159