XRT8001 Datasheet, PDF (8/48 Pages) Exar Corporation – WAN Clock for T1 and E1 Systems

XRT8001
1.0 Operating the Microprocessor Serial
Interface
Bits 2 Through 5: The Four (4) Bit Address Values
(Labeled A0, A1, A2 and A3)
The XRT8001 Serial Interface is a simple four-wire
interface that is compatible with many of the
microcontrollers available in the market. This interface
consists of the following signals:
CSB - Chip Select (Active Low)
SCLK - Serial Clock
SDI - Serial Data Input
SDO - Serial Data Output
Using the Microprocessor Serial Interface
The following instructions, for using the Micropro-
cessor Serial Interface, are best understood by
referring to the diagram in Figure 19.
In order to use the Microprocessor Serial Interface
the user must first provide a clock signal to the
SCLK input pin. Afterwards, the user will initiate a
“Read” or “Write” operation by asserting the “active-
low” Chip Select input pin (CSB). It is important to
assert the CSB pin (e.g., toggle it “low”) at least
50ns prior to the very first rising edge of the clock
signal.
Once the CSB input pin has been asserted, the type of
operation and the target register address must now be
specified by the user. The user provides this informa-
tion to the Microprocessor Serial Interface by writing
eight serial bits of data into the SDI input. Note: each
of these bits will be “clocked” into the SDI input on the
rising edge of SCLK. These eight bits are identified and
described below.
Bit 1 - “R/W” (Read/Write) Bit
This bit will be clocked into the SDI input on the first
rising edge of SCLK (after CSB has been asserted).
This bit indicates whether the current operation is a
“Read” or “Write” operation. A “1” in this bit specifies
a “Read” operation; whereas, a “0” in this bit specifies
a “Write” operation.
The next four rising edges of the SCLK signal will clock
in the 4-bit address value for this particular Read (or
Write) operation. The address selects the Command
Register, within the XRT8001, that the user will either
be reading data from, or writing data to. The user must
supply the address bits to the SDI input pin in ascend-
ing order with the LSB (least significant bit) first.
Bits 6 and 7:
The next two bits, A4 and A5, must be set to “0”, as
shown in Figure 19.
Bit 8 - A6
The value of “A6” is a “don’t care”. Once these first
eight bits have been written into the Microprocessor
Serial Interface, the subsequent action depends upon
whether the current operation is a “Read” or “Write”
operation.
Read Operation
Once the last address bit (A3) has been clocked into
the SDI input, the “Read” operation will proceed through
an idle period, lasting three SCLK periods. On the
falling edge of SCLK Cycle #8 (see Figure 19) the serial
data output signal (SDO) becomes active. At this point
the user can begin reading the data contents of the
addressed Command Register (at Address [A3, A2,
A1, A0]) via the SDO output pin. The Microprocessor
Serial Interface will output this 5-bit data word (D0
through D4) in ascending order (with the LSB first), on
the falling edges of the SCLK pin. As a consequence,
the data (on the SDO output pin) will be sufficiently
stable for reading (by the Microprocessor), on the very
next rising edge of the SCLK pin.
Rev. 1.01
8