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XRT8001 Datasheet, PDF (4/48 Pages) Exar Corporation – WAN Clock for T1 and E1 Systems | |||
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XRT8001
PIN DESCRIPTION (CONT'D)
Pin #
8
Name
MSB
9
GND
10
VCC
11
LOCKDET
12
VCC
13
CLK2
14
GND
15
VCC
16
SDI
17
CS
18
SCLK
Type
I
-
-
O
-
O
-
-
I
I
I
Description
Master/Slave Mode Select Input - Setting this input pin âHIGHâ
configures the XRT8001 to operate in the âMASTERâ Mode. Conversely,
setting this input pin âLOWâ configures the XRT8001 to operate in the
âSLAVEâ Mode.
Analog Ground
Analog Power Supply
Lock Detect Output - This output indicates whether or not the âselectedâ
internal PLL(s) are âin-lockâ or are âout-of-lockâ.
By default, this output pin is âhighâ when both PLLs are in-lockâ and will
go toggle âlowâ if either one of the PLLs is âout-of-lockâ.
However, the XRT8001 also permits the user to configure this output pin
to reflect the state of any one of the PLLs within the chip. (See Table 3.)
Digital Power Supply
Clock Output 2 - The XRT8001 will drive the desired âsynthesizedâ
signal via this output pin. This output signal will have a 50+5% duty
cycle.
Note: This output pin is tri-stated unless the âCLK1ENâ bit-field (within
Command Register CR4) has been set to â1â.
Digital Ground
Digital Power Supply
Microprocessor Serial Interface â Serial Data Input
Whenever, the user wishes to read or write data into the Command
Registers, over the Microprocessor Serial Interface, the user is expected
to apply the âRead/Writeâ bit, the Address Values (of the Command
Registers) and Data Value to be written (during âWriteâ Operations) to
this pin.
This input will be sampled on the rising edge of the SCLK pin (pin 18).
Microprocessor Serial Interface â Chip Select Input:
The Local Microprocessor must assert this pin (e.g., set it to â0â) in order
to enable communication with the XRT8001 via the Microprocessor
Serial Interface.
Note: This pin is internally pulled âhighâ.
Microprocessor Serial Interface-Clock Signal
This signal will be used to sample the data, on the SDI pin, on the rising
edge of this signal. Additionally, during âReadâ operations, the
Microprocessor Serial Interface will update the SDO output on the falling
edge of this signal.
Rev. 1.01
4
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